SR Latch Circuit Diagram - Cross-Coupled NOR Gate Implementation #165165 (License: Personal Use)

This diagram depicts an SR (Set-Reset) latch constructed from two cross-coupled NOR gates, forming a bistable multivibrator. Input R resets the output Q to 0, while input S sets Q to 1; both inputs high is invalid. The feedback paths ensure memory retention of the last valid state.

Used in digital logic textbooks, electronics tutorials, and FPGA/ASIC design guides to explain sequential logic fundamentals; matches user intent for learning or referencing basic flip-flop circuits.